Eyeq4 Datasheet «Recommended»

Mobileye EyeQ4 is a high-performance System-on-Chip (SoC) designed for vision-based Advanced Driver Assistance Systems (ADAS) and semi-autonomous driving. Launched as a significant leap over its predecessor, the EyeQ3, it provides the computational "super-computer" power required for complex environmental modeling while maintaining strict automotive power efficiency. Core Specifications & Architecture Performance: Delivers over 2.5 Teraflops (2.5 TOPS) of compute power. Power Consumption: Highly efficient, typically consuming only Process Technology: Manufactured using STMicroelectronics' 28nm FD-SOI (Fully Depleted Silicon-on-Insulator) process. Heterogeneous Processor Mix: Four multi-threaded MIPS processor cores. VMP (Vector Microcode Processors):

Performance: Offers high processing capabilities for handling the complex computations required for tasks like object detection, depth estimation, and motion forecasting. eyeq4 datasheet

EyeQ4 Datasheet Write-up

• Automotive vision SoCs provide multiple high-speed camera interfaces (MIPI CSI-2) to ingest several sensors, including forward-facing, surround, and specialized imagers.
• On-chip memory and high-bandwidth external memory controllers are designed to service both frame buffers and model weights/activations, with attention to deterministic access patterns to support real-time pipelines.
• High-speed interfaces (PCIe, Gigabit Ethernet, CAN-FD, and others depending on platform) enable integration into broader vehicle networks and communications with other ECUs or domain controllers.

For academic or evaluation purposes, Mobileye offers a redacted public datasheet (45 pages) covering mechanical, power, and thermal specs without register-level details. For academic or evaluation purposes, Mobileye offers a

Camera Support: Can process information from up to 8 cameras simultaneously at 36 frames per second (fps). EyeQ4 Variants For academic or evaluation purposes

The EyeQ4 architecture utilizes a heterogeneous mix of specialized accelerators to achieve high efficiency. Specification Performance 2.5 TOPS (High variant) / ~1.1 TOPS (Mid variant) Power Consumption ~3 Watts (Automotive grade) CPU Cores 4 multi-threaded MIPS InterAptiv cores (4 threads each) Vision Accelerators

2. Key Features

• Manufacturing Process: 28nm CMOS
• Compute Cores: 5 high-performance cores

  is built on a 28nm Fully Depleted Silicon On Insulator (FD-SOI) process, which is critical for maintaining high performance with a low power envelope of approximately 3 watts. -High Specifications Compute Performance ~2.5 Teraflops (1.26 Billion MAC/s) CPU Cores